Electrical power for an integrated circuit, such as but not limited to a microprocessor chip of a personal computer, is typically supplied by one or more direct current (battery) power sources, such as a buck-mode, pulse width modulation (PWM) based, DC—DC converter of the type diagrammatically shown in FIG. 1. As shown therein, the converter has a control circuit 1 that supplies a synchronous PWM signal to a switching circuit driver 2, for controlling the turn-on and turn-off of a pair of electronic power switching devices, to which a powered load is coupled. In the illustrated converter, the electronic power switching devices are depicted as an upper (or high side) power NMOSFET (or NFET) device 3, and a lower (or low side) power NFET device 4, having their drain-source current flow paths connected in series between an input voltage (Vin) supply rail and ground (GND).
The upper NFET device 3 is turned on and off by an upper gate switching signal UGATE applied to its gate from driver 2, while the lower NFET device 4 is turned on and off by a lower gate switching signal LGATE supplied from driver 2. A common node 5 between the two NFETs is coupled through an inductor 6 to a load reservoir capacitor 7 that is coupled to a reference voltage terminal (GND). The connection 8 between inductor 6 and capacitor 7 serves as an output node from which a desired (regulated) DC output voltage Vout is applied to a LOAD 9 (coupled to GND). The coupling impedance through the inductor is such that the output voltage is equal to the average value of the switched voltage except for some small ripple voltage.
The output node connection 8 is also fed back via a feedback resistor 10 to error amplifier circuitry within PWM controller 1. The error amplifier circuitry is used to regulate the converter's output DC voltage relative to a reference voltage supply value. In addition, the common node 5 between the controllably switched NFETs is coupled via a current sense resistor 11 to current-sensing circuitry within the controller 1, in response to which the controller adjusts duty ratio of the PWM signal, as necessary, to maintain the converter's DC output within a prescribed set of parameters.
Early computer circuits powered by such converters had operational voltages on the order of +/−5 VDC and drew only several amps of current. To realize improved performance, personal computers now employ relatively low operating voltages (on the order of 1.0 to 2.0 VDC), and may draw several tens and more amps of current. Because it is more economical to source such relatively large currents from multiple sources, power supply manufacturers now offer multi-phase DC—DC converters that can be driven by different voltage sources. In addition, if the power requirement of a particular circuit is so high that it cannot be supplied by only one DC source, the point-of-load regulator must obtain the needed power from more than one of the available DC sources. Thus, it is not uncommon for a DC—DC converter to deliver power to a computer motherboard by way of several distinct DC voltage sources including, for example, a 12 V source, a 5 V source, and a 3.3 V source. The current available from each DC sources is limited, so that the circuits on the computer's motherboard must adhere to a system power budget that limits the current drawn from each source.
One example of a circuit having a high power requirement is a computer's graphics adapter card that uses a point-of-load regulator to convert 12 V and 3.3 V DC input voltages to a DC output voltage that is regulated to a precise level significantly less than 3.3 VDC in order to properly operate the computer's graphics processor. In this and other similar cases, the point-of-load DC—DC regulator must possess at least the following functions.
First, it must regulate the DC output voltage to some level determined by a particular load. Secondly, it must regulate the DC output voltage to a precision (accuracy) dictated by a particular load. Third, it must deliver current from more than one parallel channel to a common load. Fourth, it has to balance, to a desired ratio, the currents in parallel channels sourcing a common load. Fifth, it must perform DC—DC conversion to a common load from multiple different input voltages using parallel channels. Sixth, it must regulate input current to some level dictated by the system's power budget.
One circuit architecture for balancing channel currents in a multi-phase DC—DC converter is shown in FIG. 2, which corresponds to FIG. 2 of the U.S. Patent to M. Walters et al, U.S. Pat. No. 6,278,263, entitled: “Multi-Phase Converter With Balanced Currents,” assigned to the assignee of the present application and the disclosure of which is incorporated herein. In accordance with this architecture, multi-phase channel currents of a plurality of pulse width modulator (PWM) comparators (four of which are shown at 68, 70, 72 and 74) are appropriately balanced, by supplying a correction offset to a control signal output by an error amplifier 42. The control signal has the proper sign and magnitude as to cause the output voltage to converge on a reference voltage REF, thus regulating the output voltage to the reference voltage. The error signal is common to the control circuitry for each channel i.
Measurements of the current in each channel are weighted and summed together to produce a signal proportional to the average channel current. A voltage VISENSEi representative of the current in each channel is then subtracted from a signal VAVERAGE, which is proportional to the average current, to realize current-error signals that are proportional to the difference between each channel's current and the average channel current. The current error signals are combined with the control signal to produce a correction to the current in each channel. The correction is of sufficient magnitude to cause the current in each channel to converge on the average current.
Now although the current balancing arrangement of FIG. 2 works well when each of the multi-phase converter channels employs the same DC input voltage, it is inadequate to balance the currents without modification when the channels' DC sources have different voltage levels.